Opportunity
SBIR / STTR #12793
R&D Solicitation for High-Speed Photon-Number-Resolving Sensor Array
Posted
July 01, 2026
Respond By
August 19, 2026
Identifier
12793
NAICS
541715, 541713, 334413
The Office of the Secretary of Defense (OSD), under the Department of Defense, is seeking advanced research and development proposals for a high-speed photon-number-resolving (PNR) quanta imaging sensor array. - Government Buyer: - Office of the Secretary of Defense (OSD), Department of Defense - OEMs and Vendors: - No specific OEMs or vendors are named in the solicitation - Products/Services Requested: - Research and development of a high-speed PNR sensor array - Key technical requirements: - Photon counting rates of at least 120 MHz per pixel - Photon number resolution of at least 16 - External quantum efficiency of at least 60% in the 450–550 nm wavelength range - Scalable to megapixel arrays - Monochromatic operation - High frame rates (≥120 MHz in 10 µs bursts at up to 16 kHz) - On-chip data compression for at least 500 burst sequences - Operating temperature range: -40°C to +45°C - Compatibility with quantum imaging and environmental sensing applications - Unique or Notable Requirements: - Proposals must address current state-of-the-art performance, physical limitations, new detection mechanisms or circuit architectures, and scalability challenges - Focus is on innovative R&D, not procurement of commercial off-the-shelf products - No specific part numbers or quantities are provided
Description
This solicitation seeks innovative sensor technologies capable of high-speed photon counting and timing at the quantum limit, suitable for applications in quantum imaging and environmental sensing. The project aims to develop an ultimate photon-number-resolving sensor with key performance parameters including a photon counting rate of at least 120 MHz per pixel, photon number resolution of at least 16, and external quantum efficiency of at least 60% between 450 – 550 nm. The sensor should be scalable up to megapixels, operate monochromatically, and support high frame rates and on-chip data compression. Proposals should address current state-of-the-art performance, physical limitations, new detection mechanisms or circuit architectures, and scalability challenges.