SBIR / STTR #25.4 | 25.D

Army SBIR Solicitation: Soliton-Based Micro Optical-Frequency-Comb Module Prototype

This Army SBIR opportunity seeks proposals for the development and delivery of a soliton-based, low size, weight, and power (SWaP) micro optical-frequency-comb module prototype. - Government Buyer: - Army SBIR program - Products/Services Requested: - Turn-key microcomb-based module prototype - Includes external pump-laser in industry standard 14-pin butterfly package - Integrated control electronics - Minimum of two fully tested modules required - Research and development services for design, fabrication, assembly, and laboratory testing - Technical Requirements: - Industry-standard CMOS fabrication techniques - Unit volume of 10 cc - Turnkey operation - Repetition rates: 10-40 GHz - Independent tuning of repetition and carrier-envelope frequency - Bandwidth: 30-60 nm - Power: 2W optical, 3W electrical - Application Areas: - Quantum computing, RF electronics, PNT, high-speed data, spectroscopy, UAVs, space, astronomy - OEMs and Vendors: - No specific OEMs or vendors mentioned; open to qualified suppliers and research teams - Period of Performance: - Phase I: 6 months for design and initial tests - Phase II: Fabrication and assembly of at least two modules - Phase III: Application development - Place of Performance: - Not specified; typically performed at contractor facilities or Army research centers

Description

The Army SBIR is seeking emerging optical material platforms that provide energy efficient modulation at cryogenic temperatures for use in high-performance infrared sensor arrays. The project focuses on developing electro-optic modulator (EOM) material platform solutions that exhibit excellent modulation efficiency at low temperatures (< 100 K), with key considerations including energy efficiency, compact size, low bit error rate, and low voltage biasing. Phase I involves describing, developing, and beginning fabrication of EOM solutions for cryogenic environments, with a cost up to $250,000 and a duration of up to 6 months. The effort aims to enable high aggregate data rates (> 20 Gbps) and compatibility with existing foundry processes and mixed signal digital read-out integrated circuit components.

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